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Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation: 19th International Workshop, PATMOS 2009, Delft, The Netherlands, ... Computer Science and General Issues)

date: 28 июля 2010 / author: izograv / views: 793 / comments: 0

Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation: 19th International Workshop, PATMOS 2009, Delft, The Netherlands, ... Computer Science and General Issues) by José Monteiro, and Rene van Leuken




Welcome to the proceedings of the 19th International Workshop on Power and
Timing Modeling, Optimization and Simulation, PATMOS 2009. Over the years,
PATMOS has evolved into an important European event, where researchers from
both industry and academia discuss and investigate the emerging challenges in
future and contemporary applications, design methodologies, and tools required
for the development of the upcoming generations of integrated circuits and systems.
PATMOS 2009 was organized by TU Delft, The Netherlands, with sponsorship
by the NIRICT Design Lab and Cadence Design Systems, and technical
co-sponsorship by the IEEE. Further information about the workshop is available
at http://ens.ewi.tudelft.nl/patmos09.
The technical program of PATMOS 2009 contained state-of-the-art technical
contributions, three invited keynotes, and a special session on SystemC-AMS
Extensions. The technical program focused on timing, performance, and power
consumption, as well as architectural aspects with particular emphasis on modeling,
design, characterization, analysis, and optimization in the nanometer era.
The Technical Program Committee, with the assistance of additional expert
reviewers, selected the 36 papers presented at PATMOS. The papers were organized
into 7 oral sessions (with a total of 26 papers) and 2 poster sessions
(with a total of 10 papers). As is customary for the PATMOS workshops, full
papers were required for review, and a minimum of three reviews were received
per manuscript.
Beyond the presentations of the papers, the PATMOS technical program was
enriched by a series of talks offered by world-class experts, on important emerging
research issues of industrial relevance. Toby Doorn of NXP Semiconductors
spoke about “Robust Low-Power Embedded SRAM Design: From System to
Memory Cell,” Davide Pandini of ST Microelectronics spoke about “Variability
in Advanced Nanometer Technologies: Challenges and Solutions,” and Yusuf
Leblebici of Ecole Polytechnique Federale de Lausanne spoke about “Subthreshold
Circuit Design for Ultra-Low-Power Applications.”
We would like to thank our colleagues who voluntarily worked to make this
edition of PATMOS possible: the expert reviewers; the members of the Technical
Program and Steering Committees; the invited speakers; and last but not least,
the local personnel who offered their skill, time, and extensive knowledge to
make PATMOS 2009 a memorable event.



 

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